The present invention relates to a power enabling mechanism, a power enabling method, and an input/output device controller for controlling a supply of power by an information processing apparatus to an input/output device that is attached to it; and in particular, it relates to a power enabling mechanism, a power enabling method, and an input/output device controller for controlling a supply of power to a PC card, which is inserted into the slot of a personal computer (PC) so as to be detachable. More specifically, the present invention pertains to a power enabling mechanism, a power enabling method, and an input/output device controller for securing a supply of power to a PC card that is loaded into a slot of a personal computer and for preventing a voltage decrease and a circuit fault of a PC, and the latch-up of a PC card even when power consumption for a PC card is abnormal (or there is a large consumption of power that exceeds an established standard).
Because of recent developments in packaging technique, the use of desktop and laptop (or notebook) personal computers (PCs) has become widespread.
Since a PC is generally compact or portable, the standard hardware resources that can be mounted at the shipping stage are limited. A user can, therefore, assemble his own system by attaching desired input/output devices to ports and/or to connectors in the PC.
A so-called PC card is a specific example of an input/output device for an expandable PC. The physical specifications and the electric specifications for PC cards are established mainly by the PCMCIA (Personal Computer Memory Card International Association) and JEIDA (Japan Electronic Industry Development Association). Although the standards for PC cards were only memory card specifications at the beginning, I/O card specifications were added later, and now various types of cards, such as facsimile modems, SCSIs (Small Computer System Interfaces), hard disks, and LAN (Local Area Network) adaptors, are commercially available. At the present, for most PCs the expansion of hardware resources is ensured by the provision of one or more slots into which these PC cards can be inserted (see FIG. 10). In addition to PC cards being compact and easy to exchange, PC cards support a function whereby they can be attached to and detached from a PC while it is powered on (the so-called xe2x80x9cactive insertion and extractionxe2x80x9d or xe2x80x9cPlug and Playxe2x80x9d function), and thus make easier exchange or expansion using PC cards.
FIG. 11 is a diagram illustrating the (conventional) schematic arrangement 100 of hardware by which a PC communicates with a PC card 60 that conforms to the specifications established by PCMCIA/JEIDA. PC card 60 is mechanically loaded into expansion PC slot 50 wherein it is electrically connected, via PCMCIA controller 20, to input/output bus 10 of the PC. Input/output bus 10 is a common transfer path for the exchange of data by a CPU (not shown) and individual input/output devices, and conforms to, for example, the ISA (Industry Standard Architecture) bus standard.
PCMCIA controller 20 is a controller chip for enabling connection of the PC to PC card 60. From the point of view of data distribution, PCMCIA controller 20 communicates with input/output bus 10 of the PC via interface 21, and communicates with the PC card 60 via a driver 25 and a receiver 26. Interface 21 is connected to an address signal line, a data signal line, and a control signal line of input/output bus 10 (generally, address signals are transmitted in one direction from the PC, and data signals and control signals are transmitted bidirectionally). Through interface 21, operational timings between the PC and PC card 60 are matched and data expression forms are converted. Driver 25 drives PC card 60 in accordance with the contents carried in a control signal. Driver 25 receives from interface 21 an address signal, a data signal, and a control signal that are transmitted in one direction and driver 25 sends them to PC card 60. The function of driver 25 can be understood by explaining that driver 25 is an output buffer that transmits an electric signal to PC card 60. By way of contrast, receiver 26 receives data from PC card 60 and transmits it to interface 21. Receiver 26 relays data signals that are transmitted in the return direction. Register 23 is a circuit for temporarily storing specific data, and receives part of the address signals and the data signals that are transmitted via the interface 21. Register 23 includes an address for writing a value that is designated by configuration software of the PC, an address for writing the load state of PC card 60, and an address for writing an instruction (VCC bit and VPP bit) for the supply of power to PC card 60 (which will be described later). The PC can access the individual addresses of register 23 during an I/O read cycle.
According to the standards specified by PCMCIA/JEIDA, the PC is so designed that it provides two system power lines 35 and 36 for which the voltage levels, VCC and VPP, differ according to which PC card 60 is involved. Generally, power line 35 is employed to apply a reference voltage VCC (3.3 V or 5 V) that PC card 60 requires for normal operation. Power line 36 is employed to provide voltage VPP for an optional upgrade operation (for example, for a PC card that has non-volatile memory, such as flash ROM, may employ voltage VPP for erasing data from and the writing data to the non-volatile memory) that requires a comparatively high voltage (or an auxiliary voltage VCC). According to the specifications, some PC cards 60 use only VCC while others use both VCC and VPP. PCMCIA controller 20 not only controls the exchange of data between the PC and PC card 60, but also controls the supply of power by the PC to PC card 60. More specifically, a power enabler 24, which is in PCMCIA controller 20, and a power controller 30 cooperate in the process. Power enabler 24 is provided with the VCC bit and the VPP bit in register 23, and enables or disables control signals VCCxe2x80x94En and VPPxe2x80x94En, which are employed to instruct the connection/disconnection of power lines 35 and 36, in consonance with the setting or clearing of bits. Switches 31 and 32 of power controller 30 are opened or closed, in response to the outputs of VCCxe2x80x94En and VPPxe2x80x94En, to supply or to cut off voltages VCC and VPP. P-channel MOSFETs or bipolar transistors, for example, may be used for switches 31 and 32. PCMCIA controller 20 is driven by system voltage VDD, which is different than VCC and VPP.
It is assumed that a PC card (especially, a PC card that conforms to PCMCIA/JEIDA standards) is frequently loaded into and unloaded from a PC, and various PC card types that are produced by many makers are now commercially available. However, almost nothing concerning the consumption of power by PC cards is contained in the current standards that are specified for PC cards. There are PC cards that have a large power consumption that exceeds the power supply capabilities of the PC card power circuits that are provided in the PCs, and there have been some instances where such PC cards have been loaded into the slots of PCs. In another cases, the power sources are short-circuited to the GND (ground) because of the abnormalities of internal circuits of the PC cards. Further, since the present I/O card standards that were specified for PC cards were added to the original standards that were specified for memory cards, cards such as hard disk cards (so-called Type III cards), whose power consumption is large (although neither abnormal nor over current), have been loaded into slots that were intended for memory cards. When the power consumption of a loaded PC card is unexpectedly great, the PC card power supply circuit in the PC and the power circuit of the PC itself may be destroyed, and the data contents of the memory for the PC will be lost.
In short, there are no established standards that cover power consumption by PC cards, and the internal state of PC cards cannot be determined at a glance. In spite of these problems, frequent active insertion, and extraction, of PC cards occurs as a consequence of the principle of xe2x80x9cPlug and Playxe2x80x9d. Nonetheless, power protection countermeasures for PC cards are still very important.
To provide a secure supply of power for PC cards, conventional, over-current protection circuits are located in the power lines. Fuses 33 and 34 that are inserted in series on power lines 35 and 36 in FIG. 11 are equivalent to such circuits. However, over-current protection that involves the use of fuses has the following problems:
(1) Generally, fuses 33 and 34 that are employed for the power controller 30 are chip types that are assembled on a board by soldering, and replacing them is not easy, even if they can be cut off. Accordingly, once the fuses have blown, even when a normal PC card is loaded in to the slot, the PC card is not activated.
(2) Generally, the fuses are components that have a low response speed, so that over-current flows to the PC card for a moment until the fuses are blown. Since an excess current flows to the PC card and the voltage within the PC is reduced, the operation of the PC may be halted and the contents of the main memory may be damaged.
(3) When the PC card is not activated because the PC card causes the fuses to blow, there is no interface, specified by PCMCIA/JEIDA, which can report the cause of the fault to a user or to the PC. Since the user is not aware of the abnormality, in many cases he inserts the PC card, which contains the abnormality, into other slots on the same PC or another PC, one after another, to try to determine what is wrong. This is more often performed with PC cards for which detachment is made easier for Plug-and-Play purposes. The repetitious attempts to determine what is wrong may cause the fuses of every PC card slot to be blown. Further, since the driver for the PCMCIA controller is maintained in the ON state while there is no power supplied to the PC card, the PC, to which the abnormality is not reported, will try to access the PC card. However, since the circuit components, such as transistors, can switch the input signal properly only upon the application of a drive voltage, and can not be activated when no drive voltage is applied, a current may flow in an unexpected direction within the PC components or between the components. As a result, some signals may cause a large current drop, and the internal circuit of the PC card may be destroyed by the latch-up. Furthermore, when the fuses have blown only on the VCC side, only the voltage VPP is available to drive the PC card. The application of the VPP voltage alone, which is originally optional, is counter to the specifications and creates a dangerous condition for PC cards.
There is one method where information concerning the power consumption of the PC card is written, as part of the card attribute information (CIS), into an internal ROM on the PC card so that the PC can read that information. However, as power must be supplied to the PC card in order for the information to be read from the ROM, this method does not provide complete protection.
As is described above, when a power abnormality occurs on a PC card, it is imperative that the supply of power be halted before the PC is damaged and that information concerning the occurrence of the abnormality be transmitted to the system of the PC.
It is an object of the present invention to provide a power enabling mechanism, a power enabling method, and an input/output device controller for controlling a supply of power by an information processing apparatus to an input/output device that is loaded into it.
It is another object of the present invention to provide a power enabling mechanism, a power enabling method, and an input/output device controller for controlling supply of power to a PC card that is loaded into a slot of a personal computer (PC).
It is an additional object of the present invention to provide a power enabling mechanism, a power enabling method, and an input/output device controller for securely supplying power to a PC card that is loaded into a slot of a personal computer, and for preventing a voltage reduction and a circuit fault of the PC and the latch-up of the PC card especially when power consumption by the PC card is abnormal (or a large power consumption exceeds specified standards).
To achieve the above objects, according to a first aspect of the present invention, a power enabling mechanism, which controls supply of power by an information processing apparatus to a detachable input/output device, comprises: a first power line for supplying power at a first voltage level; a second power line for supplying power at a second voltage level; a first detector for detecting an over-current in the first power line; a second detector for detecting an over-current in the second power line; disjunctive circuit means (a logical OR gate) for logically adding the outputs of the first and the second detectors; a first switch that is employed for connection and disconnection of the first power line in response to an output of the disjunctive circuit means; and a second switch that is employed for connection and disconnection of the second power line in response to an output of the disjunctive circuit means.
According to a second aspect of the present invention, a power enabling mechanism, which controls supply of power from an information processing apparatus to a detachable input/output device, comprises: a first power line for supplying power at a first voltage level, a second power line for supplying power at a second voltage level, a first detector for detecting an overcurrent in the first power line, a second detector for detecting an over-current in the second power line, OR gate means for logically adding the outputs of the first and the second detectors, a first switch that is employed for connection and disconnection of the first power line in response to an output of the OR gate means, a second switch that is employed for connection and disconnection of the second power line in response to an output of the OR gate means; and also employs the OR gate means also to report the output to the information processing apparatus.
According to a third aspect of the present invention, a power enabling mechanism, which controls supply of power from an information processing apparatus to a detachable input/output device, comprises: a first power line for supplying power at a first voltage level; a second power line for supplying power at a second voltage level; a first fuse that blows when an overcurrent flows in the first power line; a second fuse that blows when an over-current flows in the second power line; a first detection line that is set to the ON state by the blowing of the first fuse; a second detection line that is set to the ON state by the blowing of the second fuse; and a report line that is employed to carry a notice to the information processing apparatus when at least one of the first and the second detection lines is set in the ON state.
According to a fourth aspect of the present invention, an input/output device controller, which permits an information processing apparatus to communicate with a detachable input/output device, comprises: an interface that is employed for data exchange with an input/output bus of the information processing apparatus; a register for temporarily holding part of a data group that is to be exchanged; a driver for transmitting a signal to the input/output device; a power enabler for connecting and disconnecting a power line that joins the input/output device to a power source in accordance with data that are written into the register; and a detection means for detecting an over-current in the power line and for turning off the driver in response to the detection result that is obtained by the detection means.
According to a fifth aspect of the present invention, an input/output device controller, which permits an information processing apparatus to communicate with a detachable input/output device, comprises: an interface that is employed for data exchange with an input/output bus of the information processing apparatus; a register for temporarily holding part of a data group that is to be exchanged; a driver for transmitting a signal to the input/output device; a power enabler for connecting and disconnecting a power line that joins the input/output device to a power source in accordance with the contents written in the register; detection means for detecting an over-current in the power line and for providing, in the register, a field in which the detection result is written and for turning off the driver in response to the detection result that is obtained by the detection means.
According to a sixth aspect of the present invention, a power enabling method, for controlling supply of power from an information processing apparatus to a detachable input/output device, comprises the steps of: detecting whether or not there exists a supplied power abnormality; and halting transmission of a signal to the input/output device in response to the abnormality that is detected.
According to a seventh aspect of the present invention, a power enabling method, for controlling supply of power from an information processing apparatus to a detachable input/output device, comprises the steps of: detecting whether or not there exists a supplied power abnormality; halting the supply of power in response to detection of the abnormality; halting transmission of a signal to the input/output device in response to the detection of the abnormality; and reporting the detection of the abnormality to the information processing apparatus.
According to an eighth aspect of the present invention, a power enabling method, for controlling supply of power from an information processing apparatus to a detachable input/output device, comprises the steps of: initiating the supply of power in response to the loading of the input/output device into the information processing apparatus; detecting whether or not there exists a supplied power abnormality; halting the supply of power in response to detection of the abnormality; halting transmission of a signal to the input/output device in response to the detection of the abnormality; reporting the detection of the abnormality to the information processing apparatus; and maintaining the halting of the supply of power to the input/output device at least while the input/output device is loaded.
According to a ninth aspect of the present invention, a power enabling mechanism, which controls supply of power from an information processing apparatus to a detachable input/output device, comprises: a first power line for supplying power at a first voltage level; a second power line for supplying power at a second voltage level; a first detector for detecting an over-current in the first power line; a second detector for detecting an over-current in the second power line; OR gate means for logically adding the outputs of the first and the second detectors; a first switch that is employed for connection and disconnection of the first power line; first ON/OFF control means for turning on the first switch in accordance with an instruction from the information processing apparatus and for turning off the first switch in response to the logical sum that is acquired by the OR gate means and for maintaining an OFF state until an instruction is received from the information processing apparatus; a second switch that is employed for connection and disconnection of the second power line; and second ON/OFF control means for turning on the second switch according to an instruction from the information processing apparatus and for turning off the second switch in response to the logical sum that is acquired by the OR gate means and for maintaining an OFF state until an instruction is received from the information processing apparatus.
According to a tenth aspect of the present invention, a power enabling mechanism, which controls supply of power from an information processing apparatus to a detachable input/output device, comprises: a first power line for supplying power at a first voltage level; a second power line for supplying power at a second voltage level; a first detector for detecting an over-current in the first power line; a second detector for detecting an over-current in the second power line; OR gate means for logically adding the outputs of the first and the second detectors; a first switch that is employed for connection and disconnection of the first power line; first ON/OFF control means for turning on the first switch according to an instruction from the information processing apparatus and for turning off the first switch in response to the logical sum that is acquired by the OR gate means, and for maintaining an OFF state until an instruction is received from the information processing apparatus; a second switch employed for connection and disconnection of the second power line; second ON/OFF control means for turning on the second switch according to an instruction from the information processing apparatus and for turning off the second switch in response to the logical sum that is acquired by the OR gate means and for maintaining an OFF state until an instruction is received from the information processing apparatus and which also employs the OR gate means to report the output to the information processing apparatus.
According to an eleventh aspect of the present invention, an input/output device controller, which permits an information processing apparatus to communicate with a detachable input/output device, comprises: an interface that is employed for data exchange with an input/output bus of the information processing apparatus; a register for temporarily holding part of a data group that is to be exchanged; a driver for transmitting a signal to the input/output device; a power enabler for connecting and disconnecting a power line that joins the input/output device to a power source in accordance with the contents written in the register; detection means for detecting an over-current in the power line; holding means for holding a detection result until an instruction is received from the information processing apparatus; and means for turning off the driver in response to an output of the holding means.
According to a twelfth aspect of the present invention, an input/output device controller, which permits an information processing apparatus to communicate with a detachable input/output device, comprises: an interface that is employed for data exchange with an input/output bus of the information processing apparatus; a register for temporarily holding part of a data group that is to be exchanged; a driver for transmitting a signal to the input/output device; a power enabler for connecting and disconnecting a power line that connects the input/output device to a power source in accordance with the contents written in the register; detection means for detecting an over-current in the power line; holding means for holding detection result until an instruction is received from the information processing apparatus; and means for turning off the driver in response to an output of the holding means based on the contents of the register field in which the detection result is written.
According to the first, second, ninth, and tenth aspects of the present invention, a circuit (e.g., a combination of a resistor that converts a current into a voltage and an amplifier that detects a voltage level) for detecting an over-current is provided for individual power lines, and the connection and disconnection of the power lines are performed in accordance with the output of the detection circuit. As soon as a PC card that has a power abnormality (e.g., a large power consumption or a short-circuiting of an internal circuit to the GND) is loaded, the supply of power can be shut down immediately, thus preventing the system of the PC from being shut down and avoiding the destruction of the contents of its main memory. Since fuses are not employed for the disconnection of the power lines, replacement or repair of the devices is not required at all. When a user loads a PC card into other slots, one after another, to try to determine what is wrong, the damage that is caused by a conventional card will not occur.
According to the third aspect of the present invention, although fuses are employed to cut off the power to the PC card because the blowing of the fuses can be reported to the PC, the damage due to the fault can be minimized.
According to the first, second, third, ninth and tenth aspects of the present invention, even when, among the two system power lines for VCC and VPP that are specified by PCMCIA, only the power line for the reference voltage VCC is cut off, the power line for VPP can also be cut off, and the undesired destruction of the PC card can be prevented.
According to the second, third, fifth, seventh, eighth, tenth and twelfth aspects of the present invention, when an abnormality is detected in the supply of power to the PC card, the detection result can be reported to the PC. Therefore, as the result can also be reported to a user via a GUI (Graphical User Interface), etc., no unnecessary effort to confirm an abnormality is required.
According to the fourth, fifth, sixth, seventh, eighth, eleventh and twelfth aspects of the present invention, when an abnormality is detected in the supply of power to the PC card, the output of the driver for transmitting a signal (an address signal, data signal, or a control signal) to the PC card is halted, and the destruction of the internal circuit of the PC card due to the latch-up, etc., can be prevented.
According to the eighth, ninth, tenth, eleventh and twelfth aspects of the present invention, when a PC card that has a power supply abnormality is loaded into a card slot, the power line cut-off and/or the output halt of a bus signal to the PC card can be maintained. Therefore, even when a PC card that has an abnormality is being loaded, ringing of a supplied current that accompanies the repetitious connection and disconnection of the power lines to the power source can be prevented.
Other objects, the features, and the advantages of the present invention will become apparent during the following detailed explanation, of the embodiments of the present invention, that is presented while referring to the accompanying drawings.